1. Field of the Disclosure
The present invention relates to a semiconductor device, and more particularly, to a dual gate in a semiconductor device and fabricating method thereof.
2. Discussion of the Related Art
Generally, a technology for implementing a device having different transconductances on a chip simultaneously has been proposed. This technology is applied by implementing a low-voltage drive device and a high-voltage drive device.
In implementing a low-voltage drive device and a high-voltage drive device simultaneously, a dual gate oxidation process is applied in a manner that a gate forming process is generally performed twice to form a thick high-voltage gate poly and a thin low-voltage gate poly.
This gate forming method includes sequentially forming a low-voltage gate and a high-voltage gate by performing a high-voltage gate poly process, an etching process, and a low-voltage gate poly process in order.
Thus, in a gate forming method according to a related art, a high-voltage gate and a low-voltage gate are separately formed, whereby this process is relatively complicated. Moreover, a surface tension of water is generated along a wafer surface, and more particularly, along a pattern profile of a boundary between a low-voltage device area LV and a high-voltage device area HV, whereby a water mark can be formed thereof.
Therefore, this process may be less than ideal in aspects of mass production and cost.